Search results for "Memory map"
showing 4 items of 4 documents
Analysis and Visualization of Product Memory Layout in IP-XACT
2017
Modern ASIC and FPGA based embedded products use model based design, in which both hardware and software are developed in parallel. Previously HW was completed first and the information handed over to SW team, typically in the form of register tables. The information was even manually copied to SW code, making any changes error-prone and laborious. IP-XACT is the most feasible standard to model HW also for the SW needs. The HW design connectivity and overall memory layout may change due to component instantiations, configurations and conditional operation states, which makes it difficult to create register tables even for documentation. Current register design tools fall short in serving th…
A Low Cost Solution for 2D Memory Access
2006
Many of the new coding tools in the H.264/AVC video coding standard are based on 2D processing resulting in row-wise and column-wise memory accesses starting from arbitrary memory locations. This paper proposes a low cost solution for efficient realization of these 2D block memory accesses on sub-word parallel processors. It is based on the use of simple register-based data permutation networks placed between the processor and memory. The data rearrangement capabilities of the networks can further be extended with more complex control schemes. With the proposed control schemes, the networks enable row and column accesses from arbitrary memory locations for blocks of data while maintaining f…
<title>Managing compressed multimedia data in a memory hierarchy: fundamental issues and basic solutions</title>
1998
The purpose of the work is to discuss the fundamental issues and solutions in managing compressed and uncompressed multimedia data, especially voluminous continuous mediatypes (video, audio) and text in a memory hierarchy with four levels (main memory, magnetic disk, (optical or magnetic) on-line/near-line low-speed memory, and slow off-line memory, i.e. archive). We view the multimedia data in such a database to be generated, (compressed), and stored into the memory hierarchy (at the lowest non-archiving level), and subsequently retrieved, (decompressed), and presented. If unused, the data either travels down in the memory hierarchy or it is compressed and stored at the same level. We firs…
Visualization of Memory Map Information in Embedded System Design
2018
Data compression is a common requirement for displaying large amounts of information. The goal is to reduce visual clutter. The approach given in this paper uses an analysis of a data set to construct a visual representation. The visualization is compressed using the address ranges of the memory structure. This method produces a compressed version of the initial visualization, retaining the same information as the original. The presented method has been implemented as a Memory Designer tool for ASIC, FPGA and embedded systems using IP-XACT. The Memory Designer is a user-friendly tool for model based embedded system design, providing access and adjustment of the memory layout from a single v…